decoupling capacitor design with signal frequency

Hi,
I am working on a design and having various lines going out from board which are of low frequency (250Hz) Mid frequency (80Khz, 160kHz, 320khz). We are failing in immunity testing and I am looking to put maximum value of capacitor on those lines. Do any one have an idea how to choose a capacitor value based on maximum signal frequency.


Regards,
Umesh

Signal filtering (immunity) is all about impedance mismatch. The more mismatch at your frequency of interest, the more rejection the filter will give you. Depending on the impedance of your injection network (should be able to determine from the standards that define them), you can use basic filter design concepts to figure out what impedance you need to present to it. Recall that a cap's impedance is Z_C = 1/(jωC).

Remember that by adding larger caps, you will be slowing down the edges of your signals (you have to charge/discharge a bigger capacitor, so it takes more time). You might do better by adding a series element, in combination with a change of capacitor. Also, make sure you understand if the immunity issue is common mode or differential mode. Temporarily adding a large ferrite outside the UUT can help you determine which mode it is, and how much additional filtering you may need.

Thanks for suggestions Enjunear,
I am planning to use a pi filter with all the signal going out, but having difficulty choosing the capacitors and inductors values. I got immunity failure at 16Mhz, 113Mhz with bulk current injection. I am designing the filters for two signal lines one is a PWM of 250Hz frequency and other is square of 80Khz frequency.
Please share with me if you know about some guidelines or literature to decide the starting values.

For choosing the filter part values, determine how much attenuation you require and how far away it needs to be. Open a textbook on filter design, and pick an architecture that will meet your needs in as few sections as possible. The book should give you filter prototype tables with values, which you scale up to your frequency and impedance (the filter prototypes are generally given at Z₀ = 1 ohm and F_C = 1 rad/sec).

Look at the bulk current injection test setup to determine the impedance of the signal injection circuit. That will be the impedance you'll be working against for designing the filter.

Since you have PWM/clock signals with sharp edges, you should aim to pass the 9th harmonic (or higher, if reasonable) with little amplitude or phase distortion. Square waves contain purely odd harmonics (3rd, 5th, 7th, etc) according to their Fourier series expansion, so you need to retain several harmonics above the fundamental frequency to keep the signals' corners sharp.