ranbi
Newbie level 5
I wrote non-restoring parallel divider for 10 by 10. However i didnt get the speed i required. My main concern is speed. I didnt use the serialized divider coz of tht but I really need a fast signed division in vhdl. A code would be excellent but if any architecture available will be helpful too. I'm using modelsim. I'm designing my whole design in VHDL to implement an ASIC design. The divider is part of it and I think its the only reason why the entire design is slow. So plz any help in speeding up my divider
Thanks
Thanks