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identifying saturation in the MOS transistors ...

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rsashwinkumar

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In the simple MOS circuit attached, how do i identify if both the transistors are in saturation without measuring Vo ???

mos_eda_doubt.png

(The gate voltage of the n-MOS is Vg = 1.5 V and threshold voltages of both transistors are 1V. )

Plz help me out...
 

You can't, because both VG and the characteristics of the transistors are undefined.
 

I mentioned the threshold voltages to be 1V and Vg of pmos is 3V and that of nmos is 1.5V ...

---------- Post added at 18:58 ---------- Previous post was at 18:57 ----------

Or putting it the other way, how to identify the states of the transistors and how to find Vo ??
 
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    iVenky

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The drain current of both of the transistors should be same.

So now if we assume that both have the same characteristics then the only way to have same drain current is to have different Vds (because we have different Vgs for the two transistors)

We can see from the circuit that

Vsd + Vds =5

This is equation no 1.

Equate the drain current equation of the two transistors. That's equation no 2.

From that find Vds which is the output.

What do you say? Is this right?
 

Without knowing whether the transistors are in saturation or in triode region, it is not possible to apply the current equation. Thats the problem and thats the reason i wanted to know the regions of operation of the transistors.
 
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    iVenky

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Assume in the beginning. If the answer violates some basic law then you have to change the assumption and try once again.
 

you would get some answer in any assumption, it wont violate anything...
 
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    iVenky

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If what you have assumed is wrong, it will violate the law.

For eg: After finding out Vds and Vsd using the above method check if Vds and Vsd is less than the overdrive voltage. If not then the assumption is wrong or else the assumption is correct and that's the answer.

---------- Post added at 19:56 ---------- Previous post was at 19:52 ----------

What do you get after simulating it?
 

You won't have a theoretical answer. It will depend mostly on the output impedance of the NMOS and the PMOS at their respective operating points.
With luck, both PMOS and NMOS will be in saturation. Mostly, one of them will be pushed into triode, and the other in saturation.
Across PVT corners, the large gain of the circuit mostly forces it into the latter case.
That is why if you want both the MOS in saturation, some form of feedback is always required.
 

I tend to agree with checkmate's assessment.

Just to clarify a previous point: When I said that Vg and transistor characteristics are undefined, you replied thus
rsashwinkumar said:
I mentioned the threshold voltages to be 1V and Vg of pmos is 3V and that of nmos is 1.5V
Click to expand...
After I started to type my first reply, I paused to spend a few minutes attending to something else. Then I finished typing it and posted without rechecking your opening post. I'm quite sure the following line was not there at the start.
(The gate voltage of the n-MOS is Vg = 1.5 V and threshold voltages of both transistors are 1V. )
Click to expand...
You must have edited your post by inserting the line while I was pausing. I distinctly remember seeing the line "Plz help me out..." immediately below the schematic.
 

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