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I'm trying to run a PSD simulation. At this time, how should I set the frequency of the clock signal that controls Tx operation?
Other data I looked up said that it was conducted at 10MHz. I would like to know how clock frequency affects PSD.
This is a circuit diagram of the sound detection sensor.
I know that when the signal goes in, D0 goes high, the output of the second comparator goes low, and LED2 turns on.
However, I don't really understand the operating principle.
First of all, here's what I thought:
When a sound occurs...
I conducted a simulation using the AFE + mixer structure.
(At this time, the mixer's RF and LO frequencies were the same)
In this case, I have one question.
The total gain of AFE and LNA is about 30dB, and NF is 4.6dB.
I checked NFdsb at DC, and I think it has a high value of 52dB due to DC...
When I learned about pole and zero, I knew that they were calculated using Rin, Rout, Cin, and Cout values.
1/(Rin*Cin)
1/(Rout*Cout)
I know that it can be easily obtained using the formula above. However, I don't understand how the pole and zero in the picture are obtained.
Is there a simple...
I am studying diode connected cs amp while reading Razavi's book.
At this time, I thought that finding the swing would be as follows.
1) Vout_max = When M1 is cut-off and does not operate,
* Vout = VDD-Vth2
2) Vout_min = When M1 reaches saturation,
* Vout = Vds1-Vth1
In summary, Vds1-Vth1 <...
I am studying the picture above.
It makes sense that as I1 approaches 0, VDD-Vth becomes. However, I don't know why it can't go up to VDD.
I would like to know how to understand it correctly.
While reading Rajavi's book, I became curious as to why the following circuits were used.
If you know the purpose of the circuit please let me know
I know the purpose of (a) and (c).
thank you
When CS amps have diode connected loads, why do they all use pmos?
And why is the gmb term added to Rout only when there is a pmos diode connected load?
I would like to configure an integrator. At this time, I think the cap and resistor that make up the integrator determine the performance of the integrator. So, what should the performance of the amp be considered when making it? What standards do you use when designing?
I want to obtain a DC output value by using the same two frequencies as the RF and LO signals in the mixer. I am trying to create a mixer and check the properties of this mixer,
but I have the following questions. I want to obtain factors such as P1dB, IIP3, and NFdsb.
Do I need to put the RF...
I am trying to simulate an op amp made by OTA. The result comes out correctly only when the tail current is not entered. When checking the dB20, phase results of the Opamp, I wonder if I should put a bias or not.
If it's ok without the bias, I wonder what the reason is.
The simulation of the Gilbert mixer gave results closer to the integral than the product of the signals.
A low-pass filter using a resistor + capacitor is used at the Gilbert cell load stage.
I wondered if the cap at the load stage performed integration, so I removed it and simulated it, but...
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