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Recent content by zsuhh

  1. Z

    why posedge and negedge can be used to detect the edge of clock, but CAN'T others?

    For example, it can not be used for Key press rise/fall edge detect, but why it can be used for clock or reset? Thank you!
  2. Z

    My 6 layers FPGA DDR3 board layout. Any comment? Thank you.

    layer01: layer02: layer03: layer04: layer05: layer06:
  3. Z

    No ground pins FPGA chip -- ICE5LP4K-SG48ITR50? How to connect to GND?

    That is a very userful linker. Thank you!
  4. Z

    No ground pins FPGA chip -- ICE5LP4K-SG48ITR50? How to connect to GND?

    But the worse thing is that Latticesemi do not answer my questions because I am a researcher in the university! They only support company.
  5. Z

    No ground pins FPGA chip -- ICE5LP4K-SG48ITR50? How to connect to GND?

    of course, I look at the footprint. It has a thermal pad under the chip. There is no any description about the it. What I can guess is the thermal pad is the GND pin. But it is just my guess.
  6. Z

    No ground pins FPGA chip -- ICE5LP4K-SG48ITR50? How to connect to GND?

    Take a look at the picture, No ground pin. How to connect the GND of the board? Is it using the heat sink pin as ground pin?
  7. Z

    Any comment for my pcb layout?

    Top layer: Bottom layer:
  8. Z

    My FPGA board layout, any comment?

    Thank you very much. I am using allegro to layout. - - - Updated - - - spartan 6. voltage is : 3.3v, 1.2v, 1.8v - - - Updated - - - Thank you very much. I am using allegro to layout.
  9. Z

    My FPGA board layout, any comment?

    No any diff pairs on the bottom.
  10. Z

    My FPGA board layout, any comment?

    Placement layer: Top layer: Gnd layer: Power layer: Bot layer:
  11. Z

    stm32 usb debugger which is also for stm8

    A demo video is here: https://www.youtube.com/watch?v=Cn0s4JdJz6s
  12. Z

    My pcb layout, any comment?

    Yes, the bottom layer is ground with vias connecting to the top side.
  13. Z

    My pcb layout, any comment?

    This is my pcb layout top layer, any comment?
  14. Z

    Learning SoC architectures

    I think you can begin with the famous LED "Hello world" with FPGA first. Here are two "Hello world" example about xilinx FPGA Soc: Xilinx Vivado Gpio LED Hello World Example: https://www.youtube.com/watch?v=8i8GLF-Md3U Xilinx FPGA EDK "HelloWorld" demo...
  15. Z

    [SOLVED] Kick start for Embedded linux

    If you have some experience about FPGA and you also want to learn some embedded linux, I think Zynq will be the excellent choice for you. Do some google about zynq, you will find your boards. I also recorded some video about embedded linux on Zynq, maybe you will be interested, here is the...
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