Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Thanks for your reply.I also have some questions.
I need debug or test my quartus porjcet in my design using JTAG port. Perhaps i have configure "*.pof" from the EPCS64 to EP3CLS150, I also want to see the waveform in my Signaltap using JTAG port. will I encounter the JTAG error? how to solve...
I am preparing for design a board using EP3CLS150 . I don't want to using the security featuers, i want to using its logic cell only.
Thus, i found some problem .
such as "You may see this error when trying to configure a Cyclone® III LS device if the device has been configured previously via...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
