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thanks all! Now i have sovle my problem,i adding a small capacitor (220p) between the input of the TCK signal
buffer and the GND,and then the FPGA works very good.
yes! i have designed the fpga board strictly following the cyclone datasheet.i have also refered to cyclone DSK schematic.the download cable "byteblaster2" which i have bought from market i think may have no problem.The fpga EP1C3t100 's power supply is OK,when i using "AS" mode, the FPGA...
i have developed my FPGA board using EP1C3T100(CYCLONE) .I use "AS+JTAG"
configration model,but! when i config my FPGA using JTAG ,the log show"can't access JTAG chain".when i using "AS" model ,it can programe EPCS1 chip, but the verifcation is wrong.i have example my board several...
ads layout site:edaboard.com
hi all
i want to use ads's layout to develop a RF PCB ,but i have met lots of trouble.when i chose different layer,the screen has no change. i want to develop a 2 layers PCB. but i cann't bring the component to the "bottom" layer. it's very...
hi all! i am a "Advanced Design System " beginer.i don't know how to start my first course,if someone knows something about it,please! please!give me some suggestion.thanks a lot.
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