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OK, what about something like this to get you up and simulating.
always
begin
clk_p = 0;
clk_n = 1;
#10;
clk_p = 1;
clk_n = 0;
#10;
end
It is as simple as that to simulate.... the previous post from syedshan is complimentary to this one. So you might use the code...
Re: Suggest books for FPGA
To start learning "How FPGAs work" you should start with sometthing like fpga wiki to get an idea of what an FPGA is -- the architecture section will get you up to this.
Then you will need a good book. something like: learning by example. The last one recommended by...
Hello,
Division is multiplication and is sometimes possible to replace by multiplication. You just have to find a way to comfortably get the inverse of the B (say C) in the divisions A/B and then perform a A*C. But this is not necessarily always obvious.
A different solution is to check the...
OK :) here is what you can do. It happened to me and I guess I pinpointed the two main culprits here:
1) you can try to spot all the "undefined" signals in your code in order to make these signals proper '0' or '1'.
2) do you have some asynchronous resets created from synchronous logic. If yes...
Re: synchronise a Design
Hello Mostafa.
Sync design: is a necessary but not sufficient condition for a successful dig. design. If you want to sleep well :) you should follow the strict rules of sync. designs -- proper clock-domain crossing, proper counter meta-stability design and all the nice...
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