Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
xilinx xsg
Hello, I'm new to using FPGAs. I currently have the ISE 10.1 suite installed including System Generator, as well as the full Matlab/Simulink Suite.
Basically, I'm trying to figure out what the latency per block is. For instance, in one example I have, a DSP48 block has a latency...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.