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Recent content by yasminroseengle

  1. Y

    calculator disign using key encoder

    what is wrong in this caluclator simulation ? i am making a calculator that do ( + , - , divide & multiply ) process this is the state machine
  2. Y

    calculator disign using key encoder

    Counter: -- hds header_start -- -- VHDL Architecture calculator.counter.untitled -- -- Created: -- by - Asmaa.UNKNOWN (IDEA-PC) -- at - 09:47:55 10/04/2015 -- -- Generated by Mentor Graphics' HDL Designer(TM) 2001.5 (Build 170) -- -- hds header_end LIBRARY ieee; USE...
  3. Y

    calculator disign using key encoder

    this is the codes of calculator
  4. Y

    calculator disign using key encoder

    i am making a calculator doing (+ , - , * ,devision) operations using key encoder i want to make all operations on one circuit using key encoder the problem is i can do (+ & -) operation using key encoder but i can not add the (* & devision) operation on the same circuit ..as shown what is the...
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