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Recent content by xanhphysics

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    IM3 current output vs input of full differential Opamp

    IM3 simualtion hi all , I 'm looking the way to simulate IM3 current output vs input of full differential Opamp in cadence .could you pls suggest me how to simulate in cadence software . Thank you so much
  2. X

    Miller Compensation - values of zeros and poles

    Miller Compensation I got problem with my opamp design would like to seeking your help . I am design two stage op amps using Miller compensation . My design is shown in attachment . I consist of 2 stages in which the second stage is AB class op amp . I target my design for high bandwitdh opamp...
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    How to plot frequency response of mixture of z-s functions

    Dear all I have a question which wanna ask all of you for help I have transfer function combine s-z function like : T=[(0.05s^2+0.56)/s]*[(0.73z+1)/z)] do you know any code can plot frequency resonse of T by Matlab ? Thank you very much
  4. X

    help me about continuous deltal sigma modulator problem

    thank jiangxb ,anyone can help me I hope you can give me some sugesstions
  5. X

    help me about continuous deltal sigma modulator problem

    any one can help me urgent need
  6. X

    help me about continuous deltal sigma modulator problem

    I 'm a final year student . I hope all of you can help me my problem when i simulate continuous delta sigma modulator. question 1 : How i can model half delay block by Simulink ? I try to model block ( z^-1/2) ( see figure attached ) but in Simulink library don't have block (z^-1/2)...
  7. X

    Looking for an ADC delta-sigma modulator

    Hi anyone have delta-sigma modulator can upload ? Thank alot
  8. X

    Input referring noise

    Hi can anyone guide me how to measure input refering noise by cadence ? My step is : - Noise -> Noise source -> Select node then - - simulation -> got to Result Browser -> frequency sweep -> innosise In calculator i don know how to give out input refering noise... Anyone can help me ...
  9. X

    How to measure output load of buffer by Hspice of cadence

    Re: How to measure output load of buffer by Hspice of cadenc can you tell me more detail
  10. X

    How to measure output load of buffer by Hspice of cadence

    I'm designning output buffer for LA with require output load =50 ohm But after i design i dont know how to simulate to examine the value of output load by Cadence .Hope anyone can help me how to solve this problem . Best regards,
  11. X

    Help me design a 4 stage cascaded amplifier

    hi , I got problem want ask all of you I 'm design a limiting amplifier that need 4 stages which is cascaded ,each stage is a differential pair . When i design each each stage to satisfy its gain and bandwidth i must choose common mode input also .But when all of stages are cascade ,the output...
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    Help me LA amplifier design stages

    i have a project which need the guide from all of you : I 'm designing a LA amplifier but i'm not sure which one i should choose to satisfy my requirement coz i 'm a newbie in analog design This is a spec: LA spec: VDD:1.8V Gain: 60dB (maximum), preferly gain adjustable by bypassing the...
  13. X

    Ugent need help from all of you

    I 'm desingning a two stages op amp .but i have one spec which i dun know to examine offset<10mv i dun know how to use simulation o cadence to see how much offset of my op amp ? could any one tell me the method for check this spec?thanks

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