Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
fpga gate delay
hi all;
Recently,i do something about single inverter ring oscillate in FPga,but i don't kown the gate delay of Fpga.after reading some papers,i think the delay is about a few picoseconds,but i 'm not very sure about that.I'm very gratefull if you give me the exact answer...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.