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atheros art
Several mini-pci wifi card (adopting the Atheros chip-set) tests are accomplished using the nice utility reported in the subject of this topic
Do you know if other utilities, that make the same job, are available?
Could you give me further information about this utility?
Thanks...
[;)] maybe but if it is so, when you compute the overall link-budget considering the dish gain and equivalent antenna noise temperature and the LNB gain and noise figure you are neglecting the contribution of the horn...
...or the datasheet of the LNB must reports also the horn data...
I disagree 0.2-0.3 dB refers to the LNB not to the LNA at the input of the LNB
The LNB as first element has an horn that is an element with gain and low losses
--> so in the Friis formula the first low noise gain block is the horn not the LNA
0.2dB@10GHz in a LNA is not so simple as you can...
@rautio
I'd like to know if the new Sonnet release 10 with emCluster Computing can be used in a multiprocessor ( 2 to 4 dual core opteron cpu) server within windows server 2003 x64 enterprise edition operating system
how to simulate fmax
I said that current gain is unitary not zero (zero in dB)
Next if you talk about product of current and voltage you have also to consider where the product is computed (i.e on the load? On the active device? ... ) and the loading conditions
h21 means that the load is a...
power gain fmax
Cutoff Frequency fT
Frequency, at which the magnitude of the short circuit current gain h21 rolls off to 1 (0 dB).
Maximum Frequency of Oscillation fmax
Frequency, at which the unilateral power gain rolls off to 1 (0 dB).
Thanks for you big effort in checking my layout (I know what it means)
OK I undestood what you say, so no critical path could bring to this kind of behaviour
I'm thinking that the problem si related to the measurement setup, we are RF (microwave) designers and our instrumentation is far away...
Thanks for your answer diemilio, you are right simulations are fine, the problem is in measurements, and I cannot to reproduce this strange behaviour in simulations
Simulations are just for schematic, because the foundry adopted provides models for Orcad only and as you know it has not a LVS
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