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Recent content by wanghs1986

  1. W

    Queries on gm/id methodology

    definitely the gm/ID should be smaller than 1/VT. Transistor should be biased in the saturation region even in weak inversion. For weak inversion, make sure the vds larger than 4*UT. I guess you connected the transistor in the diode-connected way and drive it uing a current source, so, when...
  2. W

    Do people not use common centroid layout anymore?

    it depends on the layouter, most of time if not dealt properly, comm-centroid just make the layout larger, more parasitic and no better matching
  3. W

    continuous time comparator

    could you please make it more precise? Just a question, without clock, how can you acess the flip-flop?
  4. W

    3 bit flash adc circuit and its corresponding waveform

    I think you need some basic understanding of ADC. First sampling and quantization then switch to concrete ADC architecture
  5. W

    Stability of a single stage amplifier (source follower or common emitter)

    close loop, add iprobe (or a plane voltage source), run stb
  6. W

    IC Layout:- Running LVS

    Add dummy in the schematic also
  7. W

    Pole-zero pairs (doublets) affect stability?

    I saw your post on now newsmth, and again here. I would say the answer probably is yes, especially when other parasitic nondominant pole or coupling exists.
  8. W

    Berkeley EECS140,240,247 Classes

    it's a great beginning for analog circuit designer
  9. W

    Dual polarized sinuous antenna

    which software do you intend to use?
  10. W


    calibre, I think. It's very easy to use..
  11. W

    Are there any materials about gm/Id here?

    In fact I am trying to find the book writen by P. G.A <gm/Id design methodology for cmos analog low power integrated circuits>. And I also appreciate other relevant materials.

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