Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Recent content by wandoo

  1. W

    Verilog-A simulation error in Virtuoso

    It works right after installing ld-linux.so.2. Took me 3 days struggling and you fixed in 1min. Thank you so much!
  2. W

    Verilog-A simulation error in Virtuoso

    Hi, I am trying to setup my Cadence Virtuoso (w/ MMSIM) environment and facing with this kind of error when using sth related to Verilog-A in the test schematic. I found some people who had similar issues on google and Cadence support pages, and tried what's suggested to solve it. 1. In ADE...
See more

Part and Inventory Search

Back
Top