Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by wafer

  1. W

    Global v/s detail routing

    Hi, I wanted to know the difference between global and detail routing and how is congestion measured? does global routing happens during placement? Thanks, Shekhar
  2. W

    What are ILM's in SOC encounter

    Hi, I wanted to know what is an ILM in SOC encounter. what does it contain? how does it help on top level timng analysis? what are timing models?
  3. W

    regarding timing Design rule constraints

    Hi, I wanted to know what parameters decide max capacitance, max transition and max fanout constraints in sdc? what decides to what values we should set these values to?

Part and Inventory Search

Back
Top