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Recent content by vlsi_fanatic

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    Looking for a good book on standard cell characterization

    Cell Characterization Hi, can anyone help me find a good book for learning about standard cell characterization? are there any books uploaded? I am not able to find one. Thanks
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    Which software converts Perl script to .exe file?

    Perl to .exe conversion Hi, Any one knows any free software that can convert perl script (.pl) to an exe file? I know about perl2exe but it is a trial version. I am looking for a full version. Thanks
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    Problem with Perl script that creates directories with names

    Re: Help with perl Windows didn't change the command line behavior. In this way you don't need to escape the backslash in the path. Try using it. It works. Added after 1 minutes: If I put it in Quotes it works. Thanks.
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    Problem with Perl script that creates directories with names

    Re: Help with perl again I am getting the same error
  5. V

    Problem with Perl script that creates directories with names

    Help with perl Hi, i am new to perl. I got a problem. I am writing a script to create a directory whose name will be generated in the script. for example one of the directory name I need to create will be 9.1.3C I am getting this value in a variable ($dirname) and I am using print `mkdir...
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    How to model #delays in RTL?

    Re: #delays in RTL Hi thanks for the replies but consider this situation. I am modelling a traffic signal. The R-R delay and G-Y delay may not be equal. So how can we model this? i mean if both the lights are red they can be so only for suppose x time units. and G to Y takes y time units. How...
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    How to model #delays in RTL?

    Re: #delays in RTL #delay will be ignored by the synthesis tool as u said. but if i want some delay then how can i do it?
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    How to model #delays in RTL?

    #delays in RTL hi, can anyone tell me how to model delays in RTl? thanks
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    Questions regarding Perl for automation in an interview?

    Perl for automation Hi, I have an interview in an EDA company. They use perl for automation. Can anyone tell me what kind of questions can i expect in perl? And also i need some example code (automation) in perl. thank you.
  10. V

    Need help with the project

    Hi guys, I need to design an ethernet hub in verilog. has anyone done this before? If so please help me. I don't know how to proceed. Thanks
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    Difference between a flip flop and a Scan flip flop

    Can any one explain me the difference between a flip flop and a Scan flip flop? thanks
  12. V

    Looking for public free FPGA design tools

    FPGA design tools Hi, are there any public domain or GNU licensed FPGA design tools? if anyone knows about them please let me know. thanks
  13. V

    Difference between RTL and behavioral code

    difference between behavioural and rtl does "Ambit Buildgates" tool have the capability of understanding the behavioral level code and convert it to H/W?
  14. V

    Difference between RTL and behavioral code

    HI, what is the difference between RTL and behavioral code? are there any tools to convert behavioral code to RTL code?
  15. V

    Need help with Power PC Assembly coding

    Power Pc anybody has experience with power pc? i need help with power pc assemble coding. thanks

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