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Recent content by viswa

  1. viswa

    How to calculate SNDR n SFDR from spectrum of SD modulator

    Hi, From the spectrum of SD modulator, if I integrate the noise in the band of intrest then it is SNR. But since noise and distortion are interleaved in the spectrum hw to find out snr and sndr separately. Also, is it possible to find sfdr from the spectrum of SD modulator? Hoping for answers...
  2. viswa

    mixer pss simulation terminated prematurely without error

    Re: mixer pss simulation terminated prematurely without erro hi, its better to do qpss analysis for mixer especially for icp and iip3 as its fast even with small beat frequencies. see the link below for the mixer simulation using cadence.
  3. viswa

    TSMC CMOS 0.18um DesignKit

    tsmc 0.18um model files hi, i encounter this same porblem in cadence. even if ur model file is set correctly, it caused me this error. wat i did was to solve this was I went to the menu "Tools --setup corners "in analog design environment window and clicked "save model file". Then it worked...
  4. viswa

    how to assign the ADC dynamic range for receiver design

    adc receiver design see if the file attached can be useful for u. it explains graphically hw to find the dynamic range of an ADC.
  5. viswa

    Continous wave blocker power in Wimax

    Hi RFSystem, I was able to get the relative power level of out of band blocker for wimax.I got it form ETSI standards for wimax.May be chk it out if u can. https://webapp.etsi.org/workprogram/Report_WorkItem.asp?WKI_ID=21360 Bye.
  6. viswa

    Continous wave blocker power in Wimax

    hi rfsystem, thnx for ur reply.bt wen i see a wcdma rf reciever system it has a constant blocker profile tat is independant of the other wireless modules tat is operating nearby.it has a constant relative blocker power level of -50 dbm with respect to wanted signal...
  7. viswa

    Continous wave blocker power in Wimax

    Hi all, I need the relative power level of out of band continous wave blocker power level in wimax as specified by the standard.I couldnt find this value in ieee 802.16 standards. Can anybody say this value n give me the links as well to wer to get this blcoker profile info. bye.
  8. viswa

    Why many EDA vendors use TCL/TK to develop their EDA tools?

    Re: Why use TCL/TK? hi masai_mara, that site is asking for username and passowrd.do u have one?
  9. viswa

    Why many EDA vendors use TCL/TK to develop their EDA tools?

    Re: Why use TCL/TK? hi all, can anybody post some tutorial on tcl that has commands related to working with eda environment alone?its difficult to learn everyhting in tcl?
  10. viswa

    how can i shift left an integer?

    hi semiconductorman, but if u have ur number in bcd format,wont it be a headache to convert ur resulting numbers from binary format to bcd after each and every operation?
  11. viswa

    how can i shift left an integer?

    hi, division algorithms are complex.if u can afford some errors(apprximation to values) u can just use shift right function in vhdl(shr function).
  12. viswa

    I need the script about m@gma flow , please someonte help me

    Re: I need the script about m@gma flow , please someonte hel hi, u can obtain volcano from lib file using the flow given below: import lib -lib "libname" ".lib file location" set l /"libname" import lef rule "rule file location" -rule_file "rule file name.tcl" source "rule file name.tcl"...
  13. viswa

    .syn format in leonardo spectrum

    hi, does the ".syn format files"of leonardo spectrum equivalent to .lib files that contain timing information abt cells?if so is it possible to convert to .syn files to vhdl files so that i can import these vhdl libraries and do backannotation. if not using which files does loenardo give the...
  14. viswa

    Info about lateral BJT in CMOS technology

    Re: lateral BJT hi, see the post "customising bjt parameters"by vamsi abt lateral bjts on this forum.enter this as search term.i dont know the link
  15. viswa

    How to design a sigma-delta ADC and Decimator?

    hi, see the book by martin on analog integrated circuit design which has the block diagrams of sigma delta adc and good explanation.decimator can be implemented using vhdl with polyphase architecture.

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