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Recent content by Vineeth_S

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    How to Bond PCB and Metal for high power RF boards

    Yes, Do we have any other option to stick the PCB and copper clad?
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    How to Bond PCB and Metal for high power RF boards

    Yes, I do checked. The PCB fabrication (Metal +PCB) process was missing. I have found the process to bonding the PCB and metal. It is called sweat soldering process. and solder the PA using solder preforms. This is most simple and cost effective way i think. because other fabrication process...
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    How to Bond PCB and Metal for high power RF boards

    This is the outline of the component, LDMOS Power Amplifier Transistor Below flange has to be soldered on the heatsink for better performance.
  4. V

    How to Bond PCB and Metal for high power RF boards

    I want to bond a PCB (2 layer & 0.6mm thickness) to a Metal (copper & 4mm thickness). Could anyone help me with the process of bonding it? And there is a flange of power amplifier that has to get soldered with the metal and leads of PA has to be soldered on PCB. I came to know few options, but...
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    [moved] DDR4 Design using x16 with ECC

    Hello All, I have a doubt of using x16 SDRAMs for DDR4 design. Is it feasible to design 4Nos of x16 DRAM and 1No of x8 DRAM for ECC ? to make x72 bits ? In that case, How do we connect BG1 for ECC ? Point to point connection ? Else we have to use x16 DRAM for ECC and give no connect for the...
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    [SOLVED] DDR4 Signals and its Reference Plane

    Thanks Marce, Yeah, I doing it in same way, by swapping the DDR signal layer to other layer between DDR power.
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    [SOLVED] DDR4 Signals and its Reference Plane

    Hello All, I have a scenario that, My High speed signals(DDR4 - Add/Cmd/Cntrol/Clk and Data, DQS) are running in a sandwich planes, above layer is solid GND (reference plane) and the below layer I have two different power planes (other than from DDR supply) and all my signals crosses split in...
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    Basics of VHDL programming

    ENTITY buffer IS PORT ( a : in bit; b : out bit); END buffer; ARCHITECTURE basic OF buffer IS component inv port (i : in bit; o : out bit); end component; SIGNAL temp : bit; BEGIN a1 : inv port map (a,temp); a2 : inv port map (temp,b); END basic; In this program, what a1,a2 means ? how this...
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    Basics of VHDL programming

    yeah i know. i m ECE graduate. i m looking for some good book to study deep in VHDL. before i was clear with the concepts, now these web pages made me confuse.
  10. V

    Basics of VHDL programming

    hi all can anyone suggest me some good book to study the concept and programming in VHDL. i studied some web pages, that made me to confuse between structural , behavioural, data flow type.. what for we use "portmap", "component", how to access the variable's mentioned in portmap ? i totally...
  11. V

    External Hard Disk -- Bad Sector/ data Error

    This error will come if the disk fell down from a height of 1 or 2 feet. ?? it got a ticking sound continuously but not too noisy. i think the sound was there from the beginning.
  12. V

    External Hard Disk -- Bad Sector/ data Error

    hi all, I have iomega 500GB External hard disk. it was working properly. yesterday when i connect my hard disk windows asks me to format the disk before use. i have data for about 320GB. i didn't give format. i tried using DOS. it says "data error ( CRC )". is there any solution to solve this...

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