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Antenna Violation
hi,layoutmaster,
The diode should be reversed connected with the protected metal.
i.e. cathode connected to the protected line and anode connected to the substrate.
max capacitance violations
hi,Sam:
Yes, I'm working on logic synthesis. So the physical design tools will fix the violations for me.
hi,David:
I have a try with both set_ideal_net & set dont_touch_network. It works! There is no violations! But I still compared the netlist with the previous...
max capacitance
What's effect on max_fanout and max capacitance violation?
Currently,my design has no timing violation and max transition violation,but there are still 2 violations:max fanout and max capacitance violations on the system main clock, which I have set "dont_touch_network"...
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