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pmos nmos nand
When Max-Fanout is 8, does this mean that it is 8 for nand gates and 16 for pmos and nmos, or does this mean its 8 for all of them???
I am asking because nand uses two cmos transistors per bit and nmos/pmos is just one transistor...
Re: Design the Look-up Table
How many entries has your table got (all 8 bits are used? 256?)?
Can you give your whole table in Disjunctive Normal Form or in another Form?
I am not very good in Verilog but I can try to help with that algorithm. What is your Max-Fanout???
Re: Max Fan-out?
Low Frequency designs should have no problem with high Fan-outs but hf designs get problems which are caused by logarithmic time for charging that high capacitence.
I have read that u wont get problems with current even with extremely high Fanouts (with CMOS designs; not for TTL)
Re: matlab
I suggest Numerical Computing with MATLAB by Cleve Moler.
You can learn Matlab with good examples for real-life usage in IT industry.
https://www.mathworks.com/moler/
...and its free!!!
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