Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
here's a rough illustration of what I mean:
I'm talking about on the host board, between the PHY and the ports. Basically, are the USB2 and superspeed interfaces in the USB3 port totally independent, or are they more tightly linked? Is it going to cause a problem for the USB3 port if the USB2...
I'm designing a board which has a single USB 2.0 PHY, currently connected with the high speed pairs to a USB 3.0 port. I have another part on the board that needs a USB 2.0 connection. Can I just use a 2-port USB2.0 hub IC to split the USB2 interface to the device and the USB3 socket? Will it...
Say I have a large number of differential pairs, eg ch1-16_P and _N. I can combine each pair into a harness, eg DIFPAIR = D_P,D_N. But to tie all of those pairs together, I need to use another harness, eg CHANNELS=CH1,CH2,...,CHn. I can't, for example, use that harness to feed a REPEAT block on...
Yep, that's the point - I want to be. I don't want to change the polarity of the signal as it hits the adc, just fix the routing so I don't have to cross anything over.
I'm designing an amplifier board that takes in a low level single ended analog signal, goes through a balun, then to a differential amplifier then out to an ADC. The differential amplifier is an ADL5205 dual-channel amp which has its channels mirrored - ie the pin order on the input and output...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
