Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi,
I am trying to dump fsdb waveform using below code and it works fine on RTL design but gives an error on Gate simulation.
--------------
initial begin
#5000ns;
$fsdbDumpfile("waveform_B.fsdb");
$fsdbDumpvars(0,"tb_uvm_design.dut");
#1000ns;
$fsdbDumpoff...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
