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Recent content by uncle_urfi

  1. U

    How to calculate the power of high frequency signals?

    You can click on the terminal to measure the current going to the block in question. Clip the waveform using the 'clip' function in the calculator to remove the start-up transient effects. Take the average of the current waveform and then multiply by the voltage at the block to get the power...
  2. U

    Anybody used "eye diagram" function in Cadence spe

    eye diagram cadence Period is the 'time period' of the signal that you are plotting the eye for. (or 1/frequency). Usually eye-diagrams are used to determine the jitter on the signal that has a constant frequency but with some associated jitter.
  3. U

    vco control node swinging

    Shunting the node will bypass the high frequency noise from that node. Also, it will make the node more sluggish reducing Kv. Control voltages are established using a current to voltage converter so that it is relatively immune to the problems such as the one you have mentioned.
  4. U

    PGS Layout- Novel Architecture

    Inductors simply take up too much area upto 10 GHz and below. I have seen SerDes circuits where they are now using SAW filters externally to clean up the output of a lousy onchip oscillator. Lousy oscillators take less power which is an attractive feature. If you are shooting for a high-Q...
  5. U

    which mosis process is better?

    Looks like your design is on a paper-pencil turf for now, or you would be using some kind of a model as a 'pre-requisite'.
  6. U

    Generating microvolt input signals for IC testing

    microvolt generator There is always a 'lab-mouse' or some other poor animal. connect probes to their heads. Realistic EEG testing! Getting (to) a biomedical 'lab' would help. What we do is that if we don't have the required equipment, we go to some other lab that has that equipment, although...
  7. U

    startup on bandgap reference

    A little off-topic, but here are some good references on bandgaps. http://www.circuitsage.com/bandgap.html Search for 'Bob Pease' articles on national.com
  8. U

    PGS Layout- Novel Architecture

    This picture comes from: **broken link removed** Other references: http://www.tec.ufl.edu/~smyim/paper/yim_jssc02.pdf http://www.physica.org/xml/article.asp?article=t114a00113.xml Best Article: **broken link removed**
  9. U

    A Silly Question about Analog Switch

    Unless of course, it is a 64x64 crosspoint switch for a Fabric IC, in which case, there would be entire groups in a company with dedicated analog and RF designers working on it.
  10. U

    how to calculate jitter from Cadence simulation results?

    Two methods: ------------------------------------ Detailed explanation Sample: Use the calculator in Analog Artist to sample the waveform. On the calculator there is a printvs function. Use this to print out ascii data in a file. Use the histo() function on matlab to plot the histogram...
  11. U

    Average Current , RMS current ?

    In a full-chip simulation, you are more likely to have a positive current coming out of the supply 'on average', unless your full chip is a theoretical tank circuit. So average would do fine. If the start up period is long, then clip that portion to get a more accurate estimate. I would be...
  12. U

    Why Mentor Mixed-signal tool?

    cadence ic design sucks I have used Eldo, and Design Architect and they are not bad. With Cadence, your left hand is on the shortcuts forever; With the DArchitect, all you need is a mouse and the elegant strokes that do all the work. cool!! I haven't used ICStation myself, but people that i...
  13. U

    Help me for convert VGA analog to Digital Signal

    If regular google is not good enough for you then try this, **broken link removed**
  14. U

    how to work on DAC 0808

    dac0808 design The best way to test a dac is to get an adc. These should usually be from the same manufacturer and in some cases, you will get a development kit for a small cost as well to expedite your work. e.g. Don't try to interface an Intersil ADC with a National DAC. Life is complicated...
  15. U

    Issues with layout migration to S35

    Layout Migration There is tool out from Cadence in their IC5141 release called NeoCell. Check it out for analog layout migration. The results will obviously not be 100% but it is a solid start.

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