Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi,
I am wanting to do a design in VHDL I am been mandated to use semi formal design methods such as Yourdon which does not map well to describing hardware. Which modern methods would people suggest and how to bridge the gap between Yourdon and modern methods?
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.