Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I would like to handle two different frequency domain signal.(In the attached file.)
I want to add bit by bit.
Can anybody give me some suggestions?
How to implement it?
Best Regards.
I would like to capture two signal from RS232.
one of the sampling rate is 5KHz,the other is 100Hz.
I need to add the two data bit to bit.
cause the different sampling rate, the added result will be incorrect.
I tred to use delay element like D-filp flop, but it need lots of DFF.
I would like to...
hello everybody,
I have two different frequency signal.
One is 100Hz, the other is 5kHz.
I have to get the two signal synchrously to do something.
Can anybody tell me how to do it?
I have tried to use DFF, but it needs plenty of DFF.
Best Regards.
I have a problem about nios2.when I use nios2, and run the problem.
A problem is following.
Using cable "USB-Blaster [USB-0]", device 1, instance 0x00
Pausing target processor: not responding.
Resetting and trying again: FAILED
Leaving target processor paused
can anybody help me to solve?I have...
I would like to design an allpass filter that is real-cofficient.
And the maximum and the minimum group delay values should differ by no more than 2.
Could anybody tell me how to design it?
Best regards!
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
