Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hello Dominik,
Thank you for your kind reply. You mentioned doping the channel. Are there any special mask layers that could be used in layout? I am using gf22fdx technology from global foundries. Because I want to simulate those devices.
Hi all,
I am currently working in GF22fdx technology. I am working on device simulation and layout. I want to create devices (22nm gate length) that are always conducting current( like zero vt fet) independent of gate voltage. I tried using SLVT and ELVTWFP^2 type pmos devices and tried...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
