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Hi, all
For temperature compensation, if using 1st order DSM to quantize a PTAT voltage, reference is from BG, there should be an idle tone problem, since the PTAT voltage is almost close to DC. If it is true, is there anyway can solve the problem? is it too much to use dither here? The order...
Like what raduga_in mentioned, the Cgs/Cgd can introduce the clk feedthrough, that's why if you decrease the L, Cgs/Cgd decrease correspondingly. So dummy transistor can absorb part of the charge injection and down play the clk feedthrough if my understanding is correct.
adc with correlated double sampling
Hi, Gingerjiang:
There are several papers claim the input parasitic capacitors can seriously degrade the low-frequency noise performance in CDS. If you are interested in, I can forward those papers to you.
I'm dealing with a high precision Mash now and...
correlated double sampling integrator
Thanks,GingerJiang.
What if the input parasitic capacitance of the opamp is considerably large?
Have you ever done any simulation to explore the noise spectrum w/ CDS in transistor level? I want to plug the noise spectrum in the SIMULINK SD Toolbox...
correlated double sampling
Hi, all
I noticed for some SD ADC designs, ppl use CDS to decrease integrator leakage and flicker noise. For those of designs that circuit noises are the dominant noise sources (i.e. quantization noise is not so obvious), how can I model flicker noise and white noise...
MosCap
Hi,Everyone
We can use mosfet as a capacitor by connecting the s/d/bulk together as one node and gate as another node. Then,here is a question: what is the difference of the moscap realized by NMOS and the moscap realized by PMOS? thx
Hi,Simon110
For a 10bit 80M adc. How about if I caculate the settling time limitation in this way(assume half-cycle ):
2^10=1024 ---> 1/(2fs)<7tau -----> tau< 1/(14fs) ------> tau< 3.57 ns
So would you please let me know how you get 5.5 ns? thx
Width of the base region should be different. Normally, the vertical BJT has narrower base region (results in bigger β if the doping concentrations keep same on both sides of base and emitter). Please correct me if I'm wrong.
Hi,everyone
I'm trying to get a +2.5/-2.5 power supply from a 9V battery. But I have no idea where I should begin with. I tried to check different regulators from Digikey and totally got lost. Is there anybody can help me? thx :cry:
measure input referred noise fft
Hi, dear everyone
I have an amplifier and try to measure its input referred noise. The setup should be: ground the input pair, power the circuit and measure the output using spectrum analyzer. Here are the questions:
1. How does the spectrum analyzer deal with...
Re: NOISE in MOSFET?
It is hard to eliminate the flicker noise in low frequency applications. But some people believe that PMOS has lower flicker noise than NMOS. As the transistor dimension decreasing, this advantage of PMOS become not so obvious.
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