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Hi,
The requirements depends of the outputs 20 and 12 (Post #25). The output 12 need to be inverted. In the #25 is wrong, it is not inverted.These outputs control the gate of the PMOSFET.
If one of these outputs is high the PMOSFET is shut down.
d123 thanks, if you can send me a drawing, it will be really helpfull.
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d123 I have placed the NPN in parallel with the gate and added some pull ups but it doesn't have any impact in the circuit.
Replying the post #6, I don't need a wired NAND, where if one input is 1 and the other input is 0 then the wired output is 0 and the PMOSFET is on. I need an OR logic, if one input is 1 then the output of the wired is 1 and the PMOSFET is turn off.
Not working means the gate is always 12V. It doesn't change.
I have placed the diodes looking at the gate because I want an OR gate so when one input is "1" the gate is turn off.
I have placed the pull up between the source and the gate and the reverse diode but the circuit is still not working.
I have connected the fixed voltage to simulate the circuit, both inputs are connected to a NPN circuit and to the schottky diode and the gate.
I have simulated the new circuit...
I have two outputs from an open collector IC connected to diodes to achieve an OR wired. The circuit is used to control the turn ON and turn OFF of a PMOSFET, shall I use a pull up resitor in the source input of the PMOSFET? Does the design need a pull down in the PMOSFET gate?
The MOSFET is...
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