Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hello! Usually if in layout name 1 net and in source name - 2 nets , it means that you shorted PWM_B,X123/PWM_B. Have a look carefully, may be you put extra some vias.
As life huck you mean put some pin (for exapmle "name1") on net PWM_B and pin "name2" on net X123/PWM_B and then LVS will see...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
