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Hi
I'm doing a transient noise simulation to calculate jitter of PLL
Here I have a setup question
As figure shown below, blow line is reference clock, red one is PLL's output.
I'm curious why the waveform is not very smooth. What option can be given to make it smooth?
Furthermore, does this...
Hi!
Thanks for your reply
Here I have a DAC with 6MHz frequency clock. The band-of-interest is about 100kHz.
In this case, should FMAX be set to 12MHz or 200kHz ???
Furthermore, what is the physical meaning of "seed" ???
Thanks!
BR
CH
hey man
I am a beginner of PLL design. Here I have a problem about how to setup the .trannoise parameters to measure the jitter. Would anyone share your experience about the setup of trannoise? Thank you very much.
My PLL design has 200MHz output frequency. Following the format in hspice...
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