Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by the_STAman

  1. T

    Synopsys Primetime error in event file using vcd file from modelsim

    If you are on a pre-placement step of the ASIC flow then you don't need the .sdf for PrimeTime. The .sdf is used to produce the .vcd file which contains info for the switching activity of the design given a set of test vectors. If written correctly that should be enough to generate a power...

Part and Inventory Search

Back
Top