Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I want to design an integrated H-Bridge circuit to drive a load with 100 mA at maximum. To do so, i think that i need to determine the maximum allowed power loss per area to calculate the minimum transistor dimensions.
However, I can not find a value like that in my PDK documentation for the...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
