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The design which I am doing is flyback on LED application, so in the output side the LED model contains VDC source. So according to this the output cap has an initial value from the beginning.
Hello Everyone
Would you please help me in this problem.
I am using Orcad Cadence 16.3 to simulate AC-DC Flyback circuit, everything is good when I simulate the circuit in the open loop test, while moving to the closed loop when I try to run the simulation to a short time like 0.2s everything...
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