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Recent content by techzee

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    why is USB impedance 90ohms

    Hi all, Sorry if am re-posting the same query once again. 1. When the differential impedance of the trace be 100E why does a USB signal has impedance of 90E defined. The other high speed interfaces it self runs on a 100E impedance like PCIE etc then y a usb to have 90E impedance. 2. I read...
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    DDR3 timing analysis-CO-simulation

    Hi Neeru, I have not tried out Co simulation option so am not able to help in that. @ All: I have similar query in DDRx wizrd spreadsheet. We have an APPNOTE for interpretting wizard results for timing so that is clear. My question is related to SI measurement spreadsheet avaialble. How are...
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    looking for study partner in Candence

    See for the documentation provided from Allegro itself. Hope that will be helpful to an extent.
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    [SOLVED] Peak distortion analysis using Agilent ADS

    Hi, I want to do an worst case eye diagram simulation using ADS? Can we do peak distortion analysis,I want to give one input PRBS and check for bit sequence whther that is worst case and procedd with the output bit pattern to do further worst case analysis. If it could be done kindly guide me...
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    timing analysis for DDR2 designs?

    siva, Thanks. DDRx wizard askes for rank right of the DIMM module? Suppose I am using only DDR chips then in case what i need to fill up there.
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    Great apparise for mathematics four fours

    great, but this is without using square root, for 0 =44-44 1= 44/44 2=4/4 + 4/4 3=(4 + 4 + 4) / 4 4=4 + (4 -4) / 4 5=[(4 x 4) + 4] / 4 6=[ (4 + 4) / 4] + 4 7=44/4 - 4 8=4 + 4 + 4 - 4 9=4 + 4 + 4/4 10=(44 - 4)/ 4
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    Hi frnds.. Plz Suggest me..........

    My personal opinion, since you want to strengthen your profile it would be good if you concentrate on one factor, suppose your designing board, then think about Signal integrity, Schematics and digital. This will surely fetch you more options than switching over embed or VLSi. Once you know more...
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    looking for study partner in Candence

    there was an forum about allegro book, https://www.edaboard.com/threads/206372/ this is the link, Hope that book is helpful to others as well.
  9. T

    Hi frnds.. Plz Suggest me..........

    if u happen to know C and C++ you can switch over to Embedded btw why do u want to quit hardware design
  10. T

    details about distance in mtech

    See if its Bits pilani offering MS on VLSI. I widely guess there is this course on VLSI. Bits offers many MS work integrated courses for Working employees. Its 2 years course, for further reference visits bits pilani website to know more about work integrated courses. There is one more...
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    Great apparise for mathematics four fours

    Hi, I was reading the man who counted, from which I encountered a very good anecdote on four fours, After reading it my appreciation for mathematics grew bounds. What an beauty with 4444 you can obtain any number..
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    transmission line length question

    descent amount of explanation is given on half wave and quarter wave transmission lines with single example, See if the link is useful **broken link removed**
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    Fr4 height and thickness

    FR4 is lossy material. If u insist in using it, for thickness you can login to the website and check the thickness of the substrate material from the datasheets, You can contact the vendor for height details, They would be happy to help you out for manufacturing standards.
  14. T

    timing analysis for DDR2 designs?

    In Hyperlynx can we do Timing analysis? We can oly simulate for signal quality with IBIS models right
  15. T

    timing analysis for DDR2 designs?

    Siva, what are the things to consider before doing timing analysis. Wat data should be interpreted from the data sheet. Help me through this. I haven't done timing analysis before. I wish to do it hereafter.

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