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Recent content by tdf

  1. T

    Calibre PEX problem with UMC 0.13u design kit

    Thanks shshprsd, You helped me with this, Nice day, tdf.
  2. T

    undefined layer

    Re: Problem on post layout simulation Hi mohamedabouzied, Did you solve the issue? Can you share your experiment? I do as the AlexL's guide, and it does not work. The error is: duplicate original layer specification statement... Thanks,
  3. T

    [MOVED] calibre+pex - error while compiling rules file

    Re: calibre+pex - error while compiling rules file Dear, Did you solve the issue? Last time, I got the same issue on the gply, the Fab update some data for Calibre, and the issue is solved. Now, I got a new one, the error is still the same, but now is on the m1_nodev. Can anyone help me on...
  4. T

    Calibre DRC/LVS student guide and lab

    Hi Loktik, Thanks for your share, BTW, do you have the lab for PEX? Regards,
  5. T

    the causes of a malformed device

    Hi bro, I know this thread is very old, however, I still got the same issue. In case the malformed device is not in the resistor but in the device, and of course, the device is from PDK. I got the warning of "malformed device nmosRf1p2StdPsRec" and "malformed device pmosRf1p2StdRec". In my...
  6. T

    question on native transistor

    Hi all, For a certain process, the threshold voltage will increase as follows: native NMOS, low-Vt NMOS, normal NMOS and high-Vt NMOS. Is that right? Can anyone confirm? How about the alternative native NMOS? Thanks, TDF
  7. T

    Input and Output Capacitance of NMOS

    Dear dgnani, How to define the Cox. As my understanding, Cox is the constant parameter of a transistor. Can the simulator calculate is for me? If yes, I use the Spectre, which print parameter is refer to Cox. Thanks, TDF ---------- Post added at 06:25 ---------- Previous post was at 04:49...
  8. T

    how can i get the input capacitance of a pin

    Hi Question, Did you solve your issue? Can you give me a guide line, Thanks, TDF
  9. T

    Precision Peak detector or Sample/Hold circuit

    Hi keith1200rs, Thanks for your circuit. Do you have any related thing such as paper or document which concerns the above circuit. It's grateful if you can give me some further info. of the circuit. Regards, TDF.
  10. T

    [SOLVED] Corner & Monte-Carlo simulation in Cadence

    Hi Erikl, The enclose is very useful, Thanks you, TDF
  11. T

    [SOLVED] Corner & Monte-Carlo simulation in Cadence

    Hi eegchen and kapil kumar rajput, Did you solve your issue? Thanks, TDF.
  12. T

    System level design and simulation

    Hi kgl_13gl, I also found out that Agilent's tools can support the co-simulation. I have no idea with simulink/Matlab.
  13. T

    What is better for RF system design Ansoft or Simulink?

    Dear all, For the long time, and I no reply. In my opinion, I guess the Agilent's tools the best one for the RF design at system level. However, Cadence 6 also is a optional consideration. Thx,
  14. T

    How to use SpectreRF simulates Zin/Zout?

    Hi pancho_hideboo, In the SP analysis of SpectreRF, it also calculate the Z11, Z22, etc.. Is that the Zin or Zout of the two ports circuit? Thx, tdf
  15. T

    3-terminal capacitor in CMOS process : vncap vs vncap_inh

    Hi there, I also got the same unsure thing, I used the GlobalFoundies, and the capacitor have three terminal, but no doc mentions that. I know its subtract, but should connect it to vdd or gnd? Rgs Tdf
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