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analog power calculation is different with digital, how PA/PTPX handle analog macro? calculate according with lib file? the lib file of analog is different with digital?
I have a question about function coverage report
I defined function coverage, and generated simv.vdb/fcov directory too, the result.db is 17k, so I think the function coverage is generated
but after I call urg, I cannot find any function coverage data in the html...
One question on PCIe
I am not sure the function number in the PCIe packing
I want to design a chip with an PCIe interface, there are several module in the chip, these modules may access PCIe, so I think I can assign an unique function number to these modules to distinguish these modules? for...
I use nc-sim to verify our design,
when I merge lots of coverage test results, an error occurred
"failed due to mismatch in design checksum with the loaded model file"
the reason maybe the dut is a bridge, in each time, different slave is used to test,
could i merge coverage lick that?
search for SRAM
I want to find a SRAM, which can support burst read/write
It'd better has a last burst input signal, which means the last symbols when burst transactions.
any suggestion?
if a rom can support burst read and has the last burst signal, it is ok too,
thanks
denalimemtransaction
In order to verify reading mem operation,
data prepared in mem with setData function of DenaliMemTransaction class
for example, trans is an instance of DenaliMemTransaction, data1 and data2 are
addr=16'h0
reg [7:0] data1. data2;
data1 = new(2);
data2 = new(2)...
I think it is possible there are 65nm transistors and 90nm transistors in a sigle chip, but that doesn't mean two technologies.
and I realy don't know two different technologies can be in a chip, develop the two different technologies at the same time.
for different technology, there are...
specify in verilog
I am not sure I understand your question correctly
I think there are several ways to solve it, for example
1, specify delay in your RTL code, which is only for behavior simulation, while set constraint when you synthesis, so DC can insert delay cell in the path
2, calculate...
if the input of the ff is a asynchronism signal, it is possible.
for synchronous signal, the same path, I don't think so,
but the input of the ff may come from several different source, for example the input d=a and b,
for a path, setup error
b path, hold error
which is possible, you can fix the...
astro spice netlist
you can extract spf netlist with star-rcxt, which can be read by spice
hercules can do it too
by the way, the RC extract by Astro is not done by itself, it call star-rcxt to do that
How many bits can be corrected when LDPC decoding at most?
Actually, my question is how many bits can be changed when LDPC decoding at most, including the case of decode error.
It can be calculated by Dmin - 1 / 2 as the same as normal ECC ?
It seems the definition of Dmin of LDPC different...
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