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Thanks Shashi,
Correct me if am wrong anywhere.
So what am understanding from your statement is that,dv/dt is varied in the three modes i.e. the model is simulated in FAST mode-rise/fall time will be less than the typical and in slow mode rise/fall...
HI,
In hyperlynx tool for SI and PI,we have three modes of simulation-FAST,TYPICAL and SLOW.Can any one explain what are these three modes of simulation.:!:
The load is of higher value in fast mode,this is my understanding. Want to make...
Thanks marce,i got the IBIS model of ddr.
Am currently doing SI between FPGA and DDR2.Am using hyperlynx 8.0. As am proceeding, while doing for data strobe,am not getting the differential pair on the fpga side,but am getting differential pair on ddr2 side. I have exported from our board file...
Hi All,
I have a SIMILAR:-| to my ddr3 IBIS model. Need some discussion as well as a lot:?: of help on how to proceed for the DDRx Batch simulation.:lol:
TIA :-D:-Dand Regards,
Sudhagar ;-)
---------- Post added at 18:18 ---------- Previous post was at 18:01 ----------
Need some...
Hi All,
By this time i guess both of you might have become a pro;-) in hyperlynx 8.0,DDRx BAtch simulation.:-D:razz: Am completely new to DDR simulation ,am going to do post layout,with a "similar":-| IBIS model of the DDR SDRAM...
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