Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I am designing a bipolar cascode amplifier and I need to calculate/estimate the output capacitance.
Here is the reference circuit (from https://ocw.snu.ac.kr/sites/default/files/NOTE/5788.pdf):
Because the voltage gain of Q1 is Av=1, we can use Miller's theorem to determine the effective input...
Hi,
I have a VBIC model of a high-performance HBT (130 nm SiGe process) and I need to operate it where the parasitic capacitances are non-linear.
How would a simulation setup look like to determine these (specifically looking to determine Ccs and Ccb) at various bias points? I am using ADS...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.