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slew rate vs bandwidth
So for large signal, the transition speed of OPAMP is limited due to slew rate rather than bandwidth? In other word, slew rate is a lower limit than bandwidth for large signal?
slew rate bandwidth
Hi,
When considering speed of OPAMP, there are two parameters of slew rate and bandwidth. My gut feel is bandwidth is a very clear concept, because it is based on the solid Fourier theory. But I have no sense of slew rate. Is there inherent relation between them? Which one...
Hi Radix,
Thanks for your reply. You plotted a clear trace. The trend is everything become more and more software, as well as so-called multi-discipliine.
Cheers,
Steadyj
Hi,
I have a question about the logic design (CPLD & FPGA) in terms of career development. Normally it is a independent job, or part of a hardware engineer or electrical engineer? I think in different companies the situation may be different. I just want to have more senses.
Hi erikl,
Thank you very much! I think at least it is a point. Yes I used a Fluke multimeter. But as my understanding, the impedance of DVM will shunt the photo current. As a result the output of Log Amplifier will abate, rather than the bias voltage at INPT decreased.
Hi,
I once used AD8305 as an optical power monitor connected with a photo diode. As in AD8305 datasheet, the photo diode anode, i.e. the INPT pin of AD8305, should be biased at 0.5V natuarally due to the inside structure of chip. But during measurement, I found the voltage at INPT is 0.5V only...
Hi all, I don't know if it is a proper question to ask in this forum. But actually I want to know the veteran's suggestions. How much semiconductor knowledge is necessary or a good basis to be a good analog designer? I often feel confused when touching the component level analysis. But the...
I really don't know why. For instance, A is the reference input and B is the VCO output. After power on, B's frequency is lower than A. So we wish the phase detector can output voltage on the "UP" port. Unfortunately the uncertainty after power on maybe make the contrary action, which seems to...
Hi all, I am confused about the judge of "lead" or "lag" in phase detector.
Figure 1 is a phase detector. Figure 2 is the waveform when A leads B. But the fact "A leads B" seems to depend on the initial time. As shown in Figure 3, if the initial time is the red vertical line, it becomes "A lags...
pi control
Hi LvW, thanks for your reply. You are right that the DC bias value doesn't make sense. I uploaded a wrong file and now I have corrected it.
Yes It is just a PI controller with negative feedback. In a project I must use PI controller. And I use the RC-OPAMP combination to set up a...
pi controller circuit
Hi all, I wanted to check the stability of a PI control loop as in attachment. In circuit, I used the simplest model of OP-AMP, which has rails of +5V and ground, and the open loop voltage gain is 1e+6. It is an idealized OP-AMP model as an accessory in ORCAD, since I am...
Without the resistor connected to the ground, what will happen? I see "DC bias" by the resistor is quite straight forward. But why can't the input port of OP-AMP set up a DC link with OP-AMP's rail (power supply or ground)?
Hope an explanation. Thanks.
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