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Thank you to those who are all replied to my question.
I got the oscillation. I gave 0.5V voltage as initial condition set voltage to create imbalance then I get the wave forms.
Hii
I hope all are doing well. I am facing a problem and I need all of you help.
I am designing a LC Oscillator with the architecture shown below, and I have taken LC values to achieve corresponding 1GHz frequency ( c=25pF, L=1nH, R=10k ohm) by using f=1/(2*pi*sqrt(L*C)). for a single stage...
Hiiii
please any one help me, can i use the tunable resistor architecture which is shown below as Memristor in lower technology ( 45nm and also lower than that) ?
if yes where should I add the capacitor to restore signal( voltage)? **broken link removed**
please suggest me any other memristor...
Hiii....
i have plotted Gm vs Vgs graph,as shown below please help me to analyse that graph, why it rises suddenly, why it start to decrease, which parameter is responsible for this kind of behaviour ?
please help to know what are the short channel effects affects the transconductance ?
i know...
Thank you
In some document I found a formula to calculate unit capacitance in mismatch perspective. for that I want technology matching coefficient constant (Kσ).
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please help me that how to find that constant.
Hi,
I am designing a 12 bit SAR ADC, for that I need to select minimum unit capacitor for the DAC, And I am using sqrt(KT/C)< LSB/2 formula to calculate the capacitor value. The obtained capacitor value minimises the thermal noise impact, what about the other parameters like mismatch etc. and...
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