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Hi All,
I have to create a (Checker/Scoreboard) in SV for a packet based protocol and need a suggestion
Whether, I will use (Associative Array) or Queues for packet based protocols. I have to develop checker for PCI-Express.
Also please mention why ?
Hi All,
There is a interview question
You have a flip flop with clock and signal (A) as an input.
At output we have to delay (negedge) of signal (A) by (2) clock cycles.
Assume: At input signal (A) is high for (3) clock cycles.
Hi All,
I had been asked one question in verilog.
I have some 100 always blocks and 1 block is getting into INFINITE loop, which causing simulations to not to proceed.
How can I figure out which always is causing this problem. Also $display is not the answer I am looking for.
Hi All,
Can any body tell me
What is the application of (Virtual Functions) in System Verilog.
Why we need (Virtual Functions) at all.
Suppose I have two functions with different name and I can achieve my functionality by accessing both the functions from 2 different class by creating...
This is something similar to like Databases we have
You have to search for name of 2 person, out of 20000 entries and only these two have same name.
Algo is not coming in to my mind.
I have to search for 20000 entries in a FIFO.
Is there a shortcut in algorithm.
---------- Post added at 19:43 ---------- Previous post was at 19:41 ----------
Sorry 10000 entries, I have to look for and need to compare each one. Will be cumbersome.
Hi All,
I have been asked a question in Interview.
I am having a FIFO which can store 10000 entries. All the entries stored are different except two which are same. How can I find out which two entries are same.
Next Question: How you will figure out which is the greatest one.
Hi
All
I have a FIFO which is having a depth of 20000.
Question:
All the entries in this FIFO are different and only two entries are same.
I have to figure out. Which two entries are same.
Also I have to figure out of these 20000 entries which entry is the biggest one.
Hi All,
There is a question, which was asked by me.
Question Is:
You a flip-flop to which serial bits are coming as an input. At output you have too look for a combination of bits whether the number is divisibal by 5 or not.
The input stream don't have any limitation on number of bits.
Hi All,
Can anybody help me answering a question.
Note:- Don't as Jitter, Set-Up, Hold Time Values. I need Verilog logic.
How can i find a duration of a given (Clock) using Verilog. There are two cases when
1) Duty Cycle is 50%
2) Duty Cycle is 30%
Please help me it's important
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