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Recent content by song524

  1. S

    simulation- zero delay sim required if result is as expected per design?

    Logic function has nothing to do with DFT Simulation is to verify the function
  2. S

    SDF simulations are passing but noSDF is failing (SimVision).

    If the design is all synchronous. It should not happen. There must some delay related design blocks, which does not have a proper simulation delay in RTL.

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