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Recent content by solus

  1. S

    How to use 3 3-input NAND gates for 4 outputs?

    Re: Logic Implementation Can i just ask as to why you are not (OR)ing 4 outputs as shown from the sum of min-terms expression but you only have 3 outputs? Thanks.
  2. S

    How to use 3 3-input NAND gates for 4 outputs?

    Logic Implementation I need to use a 74LS138 de-multiplexer and a single 74LS10 (triple three-input NAND) to implement the folowing boolean function: F(a, b, c) = abc’ + ab’ + a’b’c = abc’ + ab’c + ab’c’ + a’b’c Sum of min-terms = (1, 4, 5, 6) I just don't get how exactly to use 3 3-input...

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