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Recent content by smlogan_eda

  1. S

    Op-amp simulation

    Dear FreshmanNewbie, Even if the external load capacitance is not included in your test bench for the MCP660 op-amp, I examined its model and found it does include a 2 pf capacitance at its load. Hence, I suspect the reason you are observing a 60 mV increase in output amplitude with a 5 MHz...
  2. S

    LTSPICE NMOS C-V curve plot

    Dear eelearner_ss, As with any other analog simulator, one can perform a series of small-signal AC simulations with the voltage across the voltage-capacitance element varying from the minimum to the maximum voltage over which are interested in the capacitance value. Perform each AC simulation...
  3. S

    Pin type options in Cadence Virtuoso

    Dear Junus2012, If you happen to have the "Senan" handle on the Cadence Forums, I believe you asked this same question on the Cadence Forums. This is the question from the Cadence Forums: "I have a question about the options for creating pins in Cadence virtuoso, there are many types to...

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