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Recent content by sleepinglion

  1. S

    how to design opamp with bias current 50pA???

    i need to operate the amplifier to get gainbandwidth=90MHz slewrate=80V/ms CMRR=110dB Maximum offset voltage: 25mV Minimum trans-impedance bandwidth: 1 MHz Maximum input referred noise: 70nV/√Hz i am designing trans-impedence amplifier, in analog design can we increase the length ,if so by how...
  2. S

    design of high speed transimpedence amplifier (texas instrument chip)

    specifications Minimum trans-impedance bandwidth: 1 MHz Bias current: 50pA Gain Bandwidth: 90MHz Maximum offset voltage: 25mV Maximum input referred noise: 70nV/√Hz CMRR: 110dB Slew Rate: 80V/ms can u give some suggestions how to design it or atleast how to proceed, what kind of opamp topology...
  3. S

    how to design opamp with bias current 50pA???

    hi friends, i am designing two stage opamp with bias current 50pA,so to have less current i am increasing lengths of transistor,it is coming to 12m(which is too much),by keeping width 180n. and my dc gain (45dB) is constant for 100Ghz,i need help , give me some ideas to have 50pA current...

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