Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
EDA tools use XOR to compare two layouts. There is also an option to use Not i.e two Not operations and combining the result. I came to know that while Xor operation is fast, it can give you false results. Can any one give an example where Xor fails but two not operations work?
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.