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Recent content by sisching

  1. S

    wide input range of LDO

    hi, i would like to design 2-10V LDO. But it is very difficult to desing 2-10V bandgap. Do anyone has idea?
  2. S

    Simulation of gm cell

    I would like to simulate the performance of the gm cell. What is the setting of the simulation (eg. inputs, loading ...) Are other parameters of the gm cell except gm?
  3. S

    about compensation of LDO!

    ldo compensation scheme In my opinion, the componsation of the opmap is not important. Since one of the input (opmap) should be the bandgap reference, it should be no ac signal.
  4. S

    Question about frequency response in polyphase filters

    I am studying the ployphase filter. (using a gyrator) Why the frequecny response are different when the phase of the inputs are different during the ac analysis. Could you subject any reference for me? Thank you!
  5. S

    Question on Allen's Book

    Then ... why Vgs1 is equal to Vgs3?
  6. S

    Question on Allen's Book

    Hi I have some questions on the page 401 of Allen's book (CMOS Analog Circuit Design, 2nd) At the figure 7.4-8, this states that "the gate-source voltage of M3 is translated to the gate-source of M1 via the paht M4-M5-M6" I cannot follow the step, could anyone express in detail? Thx!!!
  7. S

    Finding the first analog IC design job

    Re: Starting my career I come from Hong Kong
  8. S

    Jobs on Taiwan for foreigners

    I find that there are many vacancies in taiwan. I think it is a good opportunity for fresh graduated student. However i wonder whether these companys employ foreniger (fresh grad.) or not. Is there any taiwanese can answer me? Thx[/b]
  9. S

    Is it possible to find a analog design job in Singapore?

    I am also interested in working at Singapore. Would the singapore like to employ foreigner?
  10. S

    Finding the first analog IC design job

    Hello, I am only MPhil student, and will graduated very soon. I would like to be an analog IC designer. However many job requires at least 3-5 yrs. experience. Could any one give some tips on finding the first analog IC design job? Thx
  11. S

    PSRR circuit connection for Bandgap

    PSRR for Bandgap Of course PSRR is very very important parameter for the bandgap reference. In normal cause, it should be at least less than -20dB.
  12. S

    Where to connect dummy to avoid floating?

    Re: Dummy connection thx Actually i have the same idea with you However, if i do so, other warning is appeared ERC Warning: Gates connected to VDD/VCC Can i neglect this warning.
  13. S

    Where to connect dummy to avoid floating?

    For the better matching, dummy is alway used. where can the dummy connect to in order to avoid floating?
  14. S

    What is hot nwell in Cadence?

    I am drawing the layout by Cadence. After the DRC, there are some warnings. "Hot nwell" How can i solve this problem.
  15. S

    Testing & Measurement of Op -Amp

    I have designed an two stage opamp with following performance supply: 1.8V open loop gain: 87.1dB unity gain frequency :35.3MHz Phase Margin: 64 Slew Rate:11V/us CMRR:84.6dB PSRR-:65.5dB PSRR+:95.4dB Is there any other test i have missed? By the way, the slew rate is quite low, how can i...
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