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Recent content by SIDDHARTHA HAZRA

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    Novel method in Compensation for Op-amp

    Hi analog_wiz, I think you meant Common Source stage with Miller Cap. I think the goal (in Ahuja Comp) was to remove the feed forward path from 1st stage to 2nd stage but still have a miller compensation (or Cap multiplication). In you circuit isn't the diode blocking the Miller Cap ? The...
  2. S

    basic doubts in secondary order effects of MOSFET

    There are a lots of materials over net and good books available. 1) Design of Analog CMOS Integrated Circuits, Behzad Razavi 2) Also you can get basic info from Wikipedia 1/L' = (1+ΔL/L)L i.e. L' = ((1+ΔL/L)L)^-1 i.e. inverse Now ΔL/L is very small. Look for (1+x)^-1 binomial expansion...
  3. S

    [SOLVED] What is the correct way to bias PMOS and NMOS cascodes

    Hi dirmuid, Generation of a voltage some how is not the only purpose of a bias circuit. Imagine a scenario where a PMOS diode connect is used to generate a NMOS current sink. The gate potential of the PMOS will be adjusted based on the current flowing and the source potential (generally VDD)...
  4. S

    ICMR for differential amplifier

    Hi niya, The ICMR (i.e. the reference in LDO) is generally lower than or equals to the output voltage of the LDO, because the feedback voltage (same as the reference) can be easily generated by using a simple resistor divider. Say the output is 2.5V, so Vref can be anything below it. But lower...
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    [Moved] OTA using sub threshold input diff pair

    Ya, you can go for gm/Id method as suggested by Dominik. Your application is a low power application. With a Vg of 500mV and Vth of 550mV you can keep the diff pair in sub threshold with Von = -150mV. So that the VDS of the tail MOS is 100mV. You might have to keep the tail current mirror in...
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    Where we can connect the dummies in this diiferential pair matching?

    Hi jarillak, The PMOS diff pair will have a separate N-Well as the body is locally connected to its source. In the matching pattern the matched diff pairs will be surrounded by the dummies. So they have to be in the same well. So the dummy mos has all its terminals (G,S, D and B) shorted to the...
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    [Moved] OTA using sub threshold input diff pair

    Hi ananthesh, Generally if the gm requirement is high then the diff pairs are pushed in to sub-threshold. Also if the input common mode demands, then to keep the tail mos (current mirror mos) in saturation. But a MOS in sub-threshold generally has higher offset than a MOS in saturation (having...
  8. S

    No current copied to the amplifier

    Hi Glant, There are two thing I would like to mention: 1) NM4 has a VDS of 64uV only. So current is not getting mirrored. Check what is the DC voltage at Vin+ and Vin-. The DC voltage should be Vin+/- = Vth(NM1) + Vov(NM1) + Vdsat(NM4) to keep NM4 in saturation. 2) The architecture is a...
  9. S

    conver register into current mirror

    Current mirrors are used to generate current sources and current sinks of desired values. How can a resistor be a current source/sink ? It is a passive element. Please clarify your question ?
  10. S

    What is the best phase margin for a loop?

    No its 87 .... PM is how much more phase shift is required to make the total phase shift of the system 180. For your case the system phase has already shifted by 93 so to make it unstable it will need 87deg more shift. So the margin left in your system is 87deg .... that is why we call it margin
  11. S

    op-amp based bandgap reference problem

    Hi anhnha, If you have done the opamp connections correctly .. can you check whether it is a start up issue or not. In a bandgap there are two stable operating points. zero voltage and the other is the required voltage. A band gap starts up by finally falls down because of start up issues. You...
  12. S

    op-amp based bandgap reference problem

    As correctly pointed by Dominik Is the op-amp connection right? I think you should interchange + and - terminals .... In a band gap the negative feed back loop has to be stronger than the positive feedback loop. The PMOS M11 and 12 provides an additional 180 phase shift. Please check the...
  13. S

    Band gap stability analysis

    It would be good if you can post a snapshot of the op-amp architecture and bandgap. It would help us to analyze your point. More over in bandgap we generally do not go for a op-amp but an OTA which is used as an error amplifier to maintain a constant voltage at both of its inputs and hence the...
  14. S

    operating region of pass element in LDO

    The Vout node or the output of the LDO is loop controlled. By loop controlled it means that if the loop has sufficient gain (and assuming its stable) the the VFB (feedback node) is equal to the VREF (reference voltage). Two input of the error amplifier will be same. Now if VFB is VREF then the...
  15. S

    operating region of pass element in LDO

    Hi Subhash C, Please create a separate post for your question. This thread is to discuss anhnha's questions (who initiated the post). It is every bodies responsibility to keep the tread clean. Creating a post of your own will expose your post to every body and you can get better answers.

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