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Recent content by shraddha

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    Where to start learning HDL advanced design?

    HDL advanced design Hi.... while reading VHDL book u start learn to bulid small projects may b AND gate first in VHDL compiler. that u can get free from xilinx's site.It is called as ISE webpack,u download latest version. If you go by this way then u can pick up fast & anyways VHDl programming...
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    FPGA development boards in India

    xilinx fpga development boards india hi..... you just visit to Avnet's site.they are the authorised vendor of Xilinx.they are having cheaper fpga board also. just go through it regards, Shraddha
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    help.....regarding to design a fpga kit

    hi abhi, As echo said you visit xilinx's site for fpga kits,there are many cheaper kits available than making own's design. I have their kit's broucher also if u want then tell me regards, shraddha
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    How to do FPGA programming?

    FPGA programming Hi prm.prv, You must learn HDL first for that you first read any VHDL or verilog book may be perry or J Bhaskaran. Also Xilinx is the manafacturer of FPGAs & CPLD & various software tools.for this you must visit xilinx.com regards, shraddha
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    regarding cpld programming

    Can anyone tell me what do I do regarding followimg? I am using ISE Webpack 9.1i for CPLD programming using VHDL.I tried to program XC9536XL CPLD PC44 package. I had generated programming file & configuring of IMPACT done.While program option has cliked that time its giving error...
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    which is better registered output or combinational output ?

    hi registered o/p but u can try with combinational its not giving bad results regards shraddha
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    Any free simulators for SystemVerilog?

    free system verilog simulators hi modelsim XE supports verilog simulations.....u can download free version of modelsim XE-III 6.2c from website & can use that(for limited no of code lines)
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    How to find no. of CLB used in a FPGA?

    hi you can get this by veiwing synthesis report or design summery in ISE tool regards shraddha
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    Urgent help with VHDL codes

    hi you just first write code for transmitt data from serial interface i.e.RS232 & get synthesized it with synthesis tool maybe XST.for this you should know how RS232 works. regards shraddha
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    Books about CPLD and FPGA design

    CPLD and FPGA Design hi there are many books available......but for FPGAs from different manafactureres you have to go to those website & get information from there.....also u can read books by Tata Mcgraw Hill Regards, Shraddha
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    confuse to select between VHDL or Verilog.

    hi both are easy & simple......as u get familar with these u will come to know....but as of my expereince u start with VHDL. regards, Shraddha
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    regarding counter-vhdl code

    8 bit synchronous counter in vhdl hi mmoctar can you plz send me vhdl code for the synchronous binary 8bit counter & 6 bit counter.8 bit counter will reset after 240(in hex-F0) & 6 bit counter will reset 40 bytes(28in hex) regrads shraddha
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    regarding counter-vhdl code

    vhdl synchronous counter hi I wanna design "asynchronous" binary 8bit counter & 6 bit counter.8 bit counter will reset after 240(in hex-F0) & 6 bit counter will reset 40 bytes(28in hex).Can any1 plz give me VHDL code for it.it's very urgent. regards shraddha
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    Which code is more synthesizable: structural or behavioral?

    Re: regarding synthesis hi can u plz tell me what is the basic difference between the structural & behaviral?code is non-synthesizable means actually what happen in that.i have synthesized behaviral codes also regrads, shraddha
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    Which code is more synthesizable: structural or behavioral?

    hi which code is more synthesizable?having structral or behavioral......its urgent coz i'm not gettimg simulatio results after that regards, Shraddha

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